There are many other topics that are related to process integration. Please stay with Si based devices.
- BiCMOS process flows; material constrains
- Current bipolar transistors; constrains related to materials and devices
- Interconnect conductors and plugs; current choices and constrains.
- Barriers and caping layers for metallization
- Dielectrics and stoping layers; processing of interconnects
- DRAMS; current materials and designs.
- SOI devices: fully vs partially depleted? Performance and integration issues.
- SOI wafers; fabrication processes
- Contacts for MOS transistors n- and p-type. Requirements and solutions
- Schottky S/D; concept and realizaiton
- New doping processes for S/D regions.
- Fabrication and design of S/D in FinFets
- Band-Engineering in MOSFET.
- Ultra Thin SOI devices, issues in fabrication and operation
- 3D Integration; concept and realization.
- Current optical lithography solutions; multiple exposures.
- Non-Volatile Memory (Flash). Problem with scaling.
- Ferroelectric Random Access Memory (FeRAM). New materials and integration issues.
- Issues in high-K dielectrics
- Issues in metal gates technology
- Thermal conductivity of materials in Front End Processes and back end of line.
- Band Gap Engineering in MOSFETs
- Scaling and Vt variations
- Solutions for mobility enhancement based on orientation; process flow
Other relevant topics of you choice are acceptable.